otsdaq_prepmodernization
v2_05_02_indev
|
Libraries | |
ieee | |
std | |
work |
Use Clauses | |
ieee.STD_LOGIC_1164.all | |
ieee.STD_LOGIC_unsigned.all | |
IEEE.STD_LOGIC_arith.all | |
ieee.numeric_std.all | |
ieee.STD_LOGIC_misc.all | |
std.textio.all | |
work.fifo_adc_pkg.all |
Generics | |
FREEZEON_ERROR | INTEGER := 0 |
TB_STOP_CNT | INTEGER := 0 |
TB_SEED | INTEGER := 1 |
Ports | |
WR_CLK | in STD_LOGIC |
RD_CLK | in STD_LOGIC |
RESET | in STD_LOGIC |
SIM_DONE | out STD_LOGIC |
STATUS | out STD_LOGIC_VECTOR ( 7 downto 0 ) |
Definition at line 80 of file fifo_adc_synth.vhd.