otsdaq_prepmodernization  v2_05_02_indev
ethernet_controller Entity Reference

Libraries

IEEE 

Use Clauses

IEEE.std_logic_1164.all 

Ports

GMII_RX_CLK   in STD_LOGIC
GMII_RX_DV   in STD_LOGIC
GMII_RX_ER   in STD_LOGIC
arp_announce   in STD_LOGIC
reset   in STD_LOGIC
trigger   in STD_LOGIC
GMII_RXD   in STD_LOGIC_VECTOR ( 7 downto 0 )
dest_addr   in STD_LOGIC_VECTOR ( 31 downto 0 )
dest_mac   in STD_LOGIC_VECTOR ( 47 downto 0 )
dest_port   in STD_LOGIC_VECTOR ( 15 downto 0 )
self_addr   in STD_LOGIC_VECTOR ( 31 downto 0 )
self_mac   in STD_LOGIC_VECTOR ( 47 downto 0 )
self_port   in STD_LOGIC_VECTOR ( 15 downto 0 )
user_tx_data_in   in std_logic_vector ( 7 downto 0 )
user_tx_size_in   in STD_LOGIC_VECTOR ( 10 downto 0 )
GMII_GTX_CLK   out STD_LOGIC
GMII_TX_EN   out STD_LOGIC
GMII_TX_ER   out STD_LOGIC
busy   out STD_LOGIC
crc_chk_en   out STD_LOGIC
crc_chk_init   out STD_LOGIC
crc_chk_rd   out STD_LOGIC
crc_gen_en   out std_logic
crc_gen_init   out std_logic
crc_gen_rd   out std_logic
en_tx_data   out STD_LOGIC
four_bit_mode_out   out STD_LOGIC
src_capture_for_ctrl   out STD_LOGIC
src_capture_for_data   out STD_LOGIC
user_rx_valid_out   out STD_LOGIC
GMII_TXD   out STD_LOGIC_VECTOR ( 7 downto 0 )
crc_chk_din   out STD_LOGIC_VECTOR ( 7 downto 0 )
src_addr   out STD_LOGIC_VECTOR ( 31 downto 0 )
src_mac   out STD_LOGIC_VECTOR ( 47 downto 0 )
src_port   out STD_LOGIC_VECTOR ( 15 downto 0 )
udp_data_count   out STD_LOGIC_VECTOR ( 10 downto 0 )
udp_dest_port   out STD_LOGIC_VECTOR ( 15 downto 0 )
user_rx_data_out   out STD_LOGIC_VECTOR ( 7 downto 0 )

Detailed Description

Definition at line 25 of file ethernet_controller.vhd.


The documentation for this class was generated from the following file: