otsdaq_prepmodernization  v2_05_02_indev
data_manager Entity Reference

Libraries

ieee 

Use Clauses

ieee.std_logic_1164.all 
ieee.numeric_std.all 

Ports

b_data   in std_logic_vector ( 63 downto 0 )
b_data_we   in std_logic
b_end_packet   in std_logic
b_mode   in std_logic
four_bit_mode   in std_logic
user_busy   in std_logic
user_crc_err   in std_logic
user_crc_chk   in std_logic
user_rx_data_out   in std_logic_vector ( 7 downto 0 )
user_rx_valid_out   in std_logic
user_rx_src_addr   in std_logic_vector ( 31 downto 0 )
user_rx_src_mac   in std_logic_vector ( 47 downto 0 )
user_rx_src_port   in std_logic_vector ( 15 downto 0 )
tx_ctrl_dest_addr   in std_logic_vector ( 31 downto 0 )
tx_ctrl_dest_mac   in std_logic_vector ( 47 downto 0 )
tx_ctrl_dest_port   in std_logic_vector ( 15 downto 0 )
tx_data_dest_addr   in std_logic_vector ( 31 downto 0 )
tx_data_dest_mac   in std_logic_vector ( 47 downto 0 )
tx_data_dest_port   in std_logic_vector ( 15 downto 0 )
user_tx_dest_addr   out std_logic_vector ( 31 downto 0 )
user_tx_dest_mac   out std_logic_vector ( 47 downto 0 )
user_tx_dest_port   out std_logic_vector ( 15 downto 0 )
user_tx_enable_out   in std_logic
user_ready   in std_logic
MASTER_CLK   in std_logic
reset   in std_logic
tx_data   in std_logic_vector ( 63 downto 0 )
b_enable   out std_logic
user_tx_trigger   out std_logic
user_tx_data_in   out std_logic_vector ( 7 downto 0 )
user_tx_size_in   out std_logic_vector ( 10 downto 0 )
ram_addr   out std_logic_vector ( 63 downto 0 )
ram_rden   out std_logic
ram_wren   out std_logic
rx_data   out std_logic_vector ( 63 downto 0 )

Detailed Description

Definition at line 16 of file data_manager.vhd.


The documentation for this class was generated from the following file: