otsdaq_prepmodernization  v2_05_02_indev
fadc_mem Entity Reference

Libraries

ieee 
XilinxCoreLib 

Use Clauses

ieee.std_logic_1164.all 

Ports

clka   in STD_LOGIC
wea   in STD_LOGIC_VECTOR ( 0 downto 0 )
addra   in STD_LOGIC_VECTOR ( 9 downto 0 )
dina   in STD_LOGIC_VECTOR ( 7 downto 0 )
clkb   in STD_LOGIC
addrb   in STD_LOGIC_VECTOR ( 9 downto 0 )
doutb   out STD_LOGIC_VECTOR ( 7 downto 0 )

Detailed Description

Definition at line 43 of file fadc_mem.vhd.


The documentation for this class was generated from the following files: