otsdaq_prepmodernization  v2_05_02_indev
ethernet_FIFO_rng Entity Reference

Libraries

ieee 

Use Clauses

ieee.std_logic_1164.all 
ieee.std_logic_unsigned.all 
IEEE.std_logic_arith.all 
IEEE.std_logic_misc.all 

Generics

WIDTH  integer := 8
SEED  integer := 3

Ports

CLK   in STD_LOGIC
RESET   in STD_LOGIC
ENABLE   in STD_LOGIC
RANDOM_NUM   out STD_LOGIC_VECTOR ( WIDTH - 1 downto 0 )

Detailed Description

Definition at line 68 of file ethernet_FIFO_rng.vhd.


The documentation for this class was generated from the following file: