otsdaq_prepmodernization  v2_05_02_indev
ethernet_FIFO_dgen Entity Reference

Libraries

ieee 
work 

Use Clauses

ieee.std_logic_1164.all 
ieee.std_logic_unsigned.all 
IEEE.std_logic_arith.all 
IEEE.std_logic_misc.all 
work.ethernet_FIFO_pkg.all 

Generics

C_DIN_WIDTH  INTEGER := 32
C_DOUT_WIDTH  INTEGER := 32
C_CH_TYPE  INTEGER := 0
TB_SEED  INTEGER := 2

Ports

RESET   in STD_LOGIC
WR_CLK   in STD_LOGIC
PRC_WR_EN   in STD_LOGIC
FULL   in STD_LOGIC
WR_EN   out STD_LOGIC
WR_DATA   out STD_LOGIC_VECTOR ( C_DIN_WIDTH - 1 downto 0 )

Detailed Description

Definition at line 71 of file ethernet_FIFO_dgen.vhd.


The documentation for this class was generated from the following file: