RANDOM Entity Reference

Libraries
IEEE

Use Clauses
IEEE.STD_LOGIC_1164.all
IEEE.STD_LOGIC_ARITH.all
IEEE.STD_LOGIC_UNSIGNED.all

Generics
WIDTH	INTEGER := 32
SEED	INTEGER := 2

Ports
CLK	in STD_LOGIC
RST	in STD_LOGIC
EN	in STD_LOGIC
RANDOM_NUM	out STD_LOGIC_VECTOR ( WIDTH - 1 downto 0 )

Detailed Description

Definition at line 80 of file random.vhd.

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The documentation for this class was generated from the following files:

• otsdaq_prepmodernization/firmware/g-2/KickerControllerFirmware/GEL_CAPTAN/ipcore_dir/buf_one/simulation/random.vhd
• otsdaq_prepmodernization/firmware/g-2/KickerControllerFirmware/GEL_CAPTAN/ipcore_dir/EthernetRAM/simulation/random.vhd