otsdaq_prepmodernization
v2_05_02_indev
|
Libraries | |
IEEE |
Use Clauses | |
IEEE.STD_LOGIC_1164.all | |
IEEE.STD_LOGIC_ARITH.all | |
IEEE.STD_LOGIC_UNSIGNED.all |
Ports | |
in0 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
in1 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
in2 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
in3 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
in4 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
in5 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
in6 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
in7 | in STD_LOGIC_VECTOR ( 63 downto 0 ) |
sel | in STD_LOGIC_VECTOR ( 2 downto 0 ) |
muxout | out STD_LOGIC_VECTOR ( 63 downto 0 ) |
Definition at line 30 of file MUX64_8.vhd.