FIFO_SIM Entity Reference

Libraries
IEEE

Use Clauses
IEEE.STD_LOGIC_1164.all
IEEE.STD_LOGIC_ARITH.all
IEEE.STD_LOGIC_UNSIGNED.all

Ports
rst	in STD_LOGIC
clk	in STD_LOGIC
full	in STD_LOGIC
data_out	out STD_LOGIC_VECTOR ( 31 downto 0 )
wr_en	out STD_LOGIC
FIFO_RESET	out std_logic
threshold	out std_logic_vector ( 7 downto 0 )

Detailed Description

Definition at line 25 of file FIFO_SIM.vhd.

---

The documentation for this class was generated from the following file:

• otsdaq_prepmodernization/firmware/g-2/KickerControllerFirmware/GEL_CAPTAN/FIFO_SIM.vhd