ADDR_FIFO_rng Entity Reference

Libraries
ieee

Use Clauses
ieee.std_logic_1164.all
ieee.std_logic_unsigned.all
IEEE.std_logic_arith.all
IEEE.std_logic_misc.all

Generics
WIDTH	integer := 8
SEED	integer := 3

Ports
CLK	in STD_LOGIC
RESET	in STD_LOGIC
ENABLE	in STD_LOGIC
RANDOM_NUM	out STD_LOGIC_VECTOR ( WIDTH - 1 downto 0 )

Detailed Description

Definition at line 68 of file ADDR_FIFO_rng.vhd.

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The documentation for this class was generated from the following file:

• otsdaq_prepmodernization/firmware/g-2/KickerControllerFirmware/ipcore_dir/ADDR_FIFO/simulation/ADDR_FIFO_rng.vhd