otsdaq_prepmodernization  v2_05_02_indev
ADDR_FIFO Entity Reference

Libraries

ieee 
XilinxCoreLib 

Use Clauses

ieee.std_logic_1164.all 

Ports

clk   in STD_LOGIC
srst   in STD_LOGIC
din   in STD_LOGIC_VECTOR ( 47 downto 0 )
wr_en   in STD_LOGIC
rd_en   in STD_LOGIC
dout   out STD_LOGIC_VECTOR ( 47 downto 0 )
full   out STD_LOGIC
empty   out STD_LOGIC

Detailed Description

Definition at line 43 of file ADDR_FIFO.vhd.


The documentation for this class was generated from the following file: