otsdaq_prepmodernization  v2_05_02_indev
create_packet.vhd
1 -------------------------------------------------------------------------------
2 --
3 -- Title : Create Packet
4 -- Design : ethernet_controller
5 -- Author : Ryan Rivera
6 -- Company : FNAL
7 --
8 -------------------------------------------------------------------------------
9 --
10 -- File : c:\HDL_Designs\dig_gec\ethernet_controller\compile\create_packet.vhd
11 -- Generated : 03/20/09 15:19:30
12 -- From : c:/HDL_Designs/dig_gec/ethernet_controller/src/create_packet.asf
13 -- By : FSM2VHDL ver. 5.0.5.6
14 --
15 -------------------------------------------------------------------------------
16 --
17 -- Description :
18 --
19 -------------------------------------------------------------------------------
20 
21 library IEEE;
22 use IEEE.std_logic_1164.all;
23 use IEEE.std_logic_arith.all;
24 use IEEE.std_logic_unsigned.all;
25 
26 entity create_packet is
27  port (
28  addrs: in STD_LOGIC_VECTOR (7 downto 0);
29  arp_busy: in STD_LOGIC;
30  checksum: in STD_LOGIC_VECTOR (15 downto 0);
31  clk: in STD_LOGIC;
32  data_length: in STD_LOGIC_VECTOR (10 downto 0);
33  dest_ip: in STD_LOGIC_VECTOR (31 downto 0);
34  dest_mac: in STD_LOGIC_VECTOR (47 downto 0);
35  dest_port: in STD_LOGIC_VECTOR (15 downto 0);
36  ping: in STD_LOGIC;
37  reset: in STD_LOGIC;
38  trigger: in STD_LOGIC;
39  busy: out STD_LOGIC;
40  crc_gen_en: out STD_LOGIC;
41  crc_gen_init: out STD_LOGIC;
42  crc_gen_rd: out STD_LOGIC;
43  dataout: out STD_LOGIC_VECTOR (7 downto 0);
44  en_tx_data: out STD_LOGIC;
45  tx_en: out STD_LOGIC;
46  tx_er: out STD_LOGIC;
47  udp_data_sel: out STD_LOGIC);
48 end create_packet;
49 
50 architecture create_packet_arch of create_packet is
51 
52 -- diagram signals declarations
53 signal delay_count: INTEGER range 0 to 65535;
54 signal IP_length: STD_LOGIC_VECTOR (15 downto 0);
55 signal length_count: STD_LOGIC_VECTOR (10 downto 0);
56 signal old_trig: STD_LOGIC;
57 signal ping_packet: STD_LOGIC;
58 signal sleep_count: INTEGER range 0 to 65535;
59 signal test_data: STD_LOGIC_VECTOR (7 downto 0);
60 signal trigger_sig: STD_LOGIC;
61 signal UDP_length: STD_LOGIC_VECTOR (15 downto 0);
62 signal zero_fill_count: STD_LOGIC_VECTOR (10 downto 0);
63 
64 -- SYMBOLIC ENCODED state machine: Sreg0
65 type Sreg0_type is (
66  SendPacket_Dest_S11, SendPacket_Dest_S12, SendPacket_Dest_S13, SendPacket_Dest_S14, SendPacket_Dest_S15, SendPacket_Src_S16, SendPacket_Src_S18,
67  SendPacket_Src_S19, SendPacket_Src_S20, SendPacket_Src_S21, SendPacket_Src_S17, SendPacket_Type_S26, SendPacket_Type_S29, SendPacket_Dest_S22,
68  SendPacket_Payload_IP_TotLength2, SendPacket_Payload_IP_VersionAndHeader, SendPacket_Payload_IP_TotLength1, SendPacket_Payload_IP_ToS1,
69  SendPacket_Payload_UDP_SourcePort1, SendPacket_Payload_UDP_DestPort1, SendPacket_Payload_IP_ID1, SendPacket_Payload_IP_ID2, SendPacket_Payload_IP_FlagsAndFrag,
70  SendPacket_Payload_IP_FragmentOffset, SendPacket_Payload_IP_TTL, SendPacket_Payload_IP_Protocol, SendPacket_Payload_IP_Checksum1,
71  SendPacket_Payload_IP_Checksum2, SendPacket_Payload_IP_SourceAddr1, SendPacket_Payload_IP_SourceAddr2, SendPacket_Payload_IP_SourceAddr3,
72  SendPacket_Payload_IP_SourceAddr4, SendPacket_Payload_IP_DestAddr1, SendPacket_Payload_IP_DestAddr2, SendPacket_Payload_IP_DestAddr3,
73  SendPacket_Payload_IP_DestAddr4, SendPacket_Payload_UDP_Length1, SendPacket_Payload_UDP_DestPort2, SendPacket_Payload_UDP_SourcePort2,
74  SendPacket_Payload_UDP_Length2, SendPacket_Payload_UDP_Checksum1, SendPacket_Payload_UDP_Checksum2, SendPacket_Payload_UDP_DataLoop,
75  Idle, sleep, CheckBusy, SendPacket_Preamble_S58, SendPacket_Preamble_S57, SendPacket_CRC_crc4, SendPacket_CRC_crc3, SendPacket_CRC_crc2,
76  SendPacket_CRC_S59, SendPacket_CRC_crc1, SendPacket_CRC_S1
77 );
78 -- attribute enum_encoding of Sreg0_type: type is ... -- enum_encoding attribute is not supported for symbolic encoding
79 
80 signal Sreg0: Sreg0_type;
81 
82 begin
83 
84 -- concurrent signals assignments
85 
86 -- Diagram ACTION
87 trig_proc : process (clk) -- make trigger sig a single clock width pulse
88 begin
89  if rising_edge(clk) then
90  trigger_sig <= '0';
91  old_trig <= trigger;
92  if reset = '1' then
93  trigger_sig <= '0';
94  elsif trigger = '1' and old_trig = '0' then
95  trigger_sig <= '1';
96  end if;
97  end if;
98 end process;
99 zero_proc : process(clk)
100 begin
101 if rising_edge(clk) and trigger_sig = '1' then
102  IP_length(15 downto 11) <= (others => '0');
103  IP_length(10 downto 0) <= data_length + x"1C";
104 -- IP data length = actual data + 20 (IP header) + 8 (UDP header)
105  UDP_length(15 downto 11) <= (others => '0');
106  UDP_length(10 downto 0) <= data_length + x"08";
107 -- UDP data length = actual data + 20 (IP header) + 8 (UDP header)
108  if data_length < ("000"&x"12") then
109  zero_fill_count <= ("000"&x"12") - data_length;
110  else
111  zero_fill_count <= (others => '0');
112  end if;
113 end if;
114 end process;
115 
116 ----------------------------------------------------------------------
117 -- Machine: Sreg0
118 ----------------------------------------------------------------------
119 Sreg0_machine: process (clk)
120 begin
121  if clk'event and clk = '1' then
122  if reset = '1' then
123  Sreg0 <= Idle;
124  -- Set default values for outputs, signals and variables
125  -- ...
126  dataout <= x"00";
127  udp_data_sel <= '0';
128  -- used as select line for output mux and to
129 -- lock out arp responses
130  sleep_count <= 50;
131  -- for testing so not triggered twice by accident
132  en_tx_data <= '0';
133  -- a '1' indicates to the user to provide data on
134 -- user_tx_data_in(7:0) starting on the next rising edge and
135 -- continuing on every clock until data is exhausted
136  busy <= '0';
137  -- if set, indicates that trigger will be ignored
138  tx_er <= '0';
139  tx_en <= '0';
140  crc_gen_en <= '0';
141  crc_gen_init <= '0';
142  crc_gen_rd <= '0';
143  ping_packet <= '0';
144  else
145  -- Set default values for outputs, signals and variables
146  -- ...
147  case Sreg0 is
148  when Idle =>
149  dataout <= x"00";
150  udp_data_sel <= '0';
151  -- used as select line for output mux and to
152  -- lock out arp responses
153  sleep_count <= 50;
154  -- for testing so not triggered twice by accident
155  en_tx_data <= '0';
156  -- a '1' indicates to the user to provide data on
157  -- user_tx_data_in(7:0) starting on the next rising edge and
158  -- continuing on every clock until data is exhausted
159  busy <= '0';
160  -- if set, indicates that trigger will be ignored
161  tx_er <= '0';
162  tx_en <= '0';
163  crc_gen_en <= '0';
164  crc_gen_init <= '0';
165  crc_gen_rd <= '0';
166  ping_packet <= '0';
167  if trigger_sig = '1' then
168  Sreg0 <= CheckBusy;
169  length_count <= data_length;
170  busy <= '1';
171  if ping = '1' then
172  ping_packet <= '1';
173  end if;
174  end if;
175  when sleep =>
176  sleep_count <= sleep_count - 1;
177  udp_data_sel <= '0';
178  if sleep_count = 1 then
179  Sreg0 <= Idle;
180  end if;
181  when CheckBusy =>
182  if arp_busy = '0' then
183  Sreg0 <= SendPacket_Preamble_S57;
184  udp_data_sel <= '1';
185  --sel mux output
186  crc_gen_init <= '1';
187  -- init crc
188  delay_count <= 7;
189  end if;
190  when SendPacket_Dest_S11 =>
191  dataout <= dest_mac(39 downto 32);
192  Sreg0 <= SendPacket_Dest_S12;
193  when SendPacket_Dest_S12 =>
194  dataout <= dest_mac(31 downto 24);
195  Sreg0 <= SendPacket_Dest_S13;
196  when SendPacket_Dest_S13 =>
197  dataout <= dest_mac(23 downto 16);
198  Sreg0 <= SendPacket_Dest_S14;
199  when SendPacket_Dest_S14 =>
200  dataout <= dest_mac(15 downto 8);
201  Sreg0 <= SendPacket_Dest_S15;
202  when SendPacket_Dest_S15 =>
203  dataout <= dest_mac(7 downto 0);
204  Sreg0 <= SendPacket_Src_S16;
205  when SendPacket_Dest_S22 =>
206  dataout <= dest_mac(47 downto 40);
207  --first byte of dest MAC
208  crc_gen_en <= '1';
209  Sreg0 <= SendPacket_Dest_S11;
210  when SendPacket_Src_S16 =>
211  dataout <= x"00";
212  Sreg0 <= SendPacket_Src_S18;
213  when SendPacket_Src_S18 =>
214  dataout <= x"80";
215  Sreg0 <= SendPacket_Src_S17;
216  when SendPacket_Src_S19 =>
217  dataout <= addrs;
218  Sreg0 <= SendPacket_Type_S26;
219  when SendPacket_Src_S20 =>
220  dataout <= x"00";
221  Sreg0 <= SendPacket_Src_S19;
222  when SendPacket_Src_S21 =>
223  dataout <= x"EC";
224  Sreg0 <= SendPacket_Src_S20;
225  when SendPacket_Src_S17 =>
226  dataout <= x"55";
227  Sreg0 <= SendPacket_Src_S21;
228  when SendPacket_Type_S26 =>
229  dataout <= x"08";
230  Sreg0 <= SendPacket_Type_S29;
231  when SendPacket_Type_S29 =>
232  dataout <= x"00";
233  Sreg0 <= SendPacket_Payload_IP_VersionAndHeader;
234  when SendPacket_Payload_UDP_SourcePort1 =>
235  dataout <= x"07";
236  -- source port is claimed as 2001... but will receive messages to any port
237  Sreg0 <= SendPacket_Payload_UDP_SourcePort2;
238  when SendPacket_Payload_UDP_DestPort1 =>
239  dataout <= dest_port(15 downto 8);
240  --0x07D0 => port 2000
241  Sreg0 <= SendPacket_Payload_UDP_DestPort2;
242  when SendPacket_Payload_UDP_Length1 =>
243  dataout <= UDP_length(15 downto 8);
244  Sreg0 <= SendPacket_Payload_UDP_Length2;
245  when SendPacket_Payload_UDP_DestPort2 =>
246  dataout <= dest_port(7 downto 0);
247  --0x07D0 => port 2000
248  Sreg0 <= SendPacket_Payload_UDP_Length1;
249  when SendPacket_Payload_UDP_SourcePort2 =>
250  dataout <= x"D1";
251  Sreg0 <= SendPacket_Payload_UDP_DestPort1;
252  when SendPacket_Payload_UDP_Length2 =>
253  dataout <= UDP_length(7 downto 0);
254  -- 13 bytes = 8 header + 5 data
255  Sreg0 <= SendPacket_Payload_UDP_Checksum1;
256  when SendPacket_Payload_UDP_Checksum1 =>
257  dataout <= x"00";
258  -- 0 indicates unused
259  Sreg0 <= SendPacket_Payload_UDP_Checksum2;
260  when SendPacket_Payload_UDP_Checksum2 =>
261  dataout <= x"00";
262  test_data <= x"41";
263  -- A
264  if ping_packet = '0' then
265  en_tx_data <= '1';
266  -- indicates to user to have data present on next rising clock edge
267  end if;
268  Sreg0 <= SendPacket_Payload_UDP_DataLoop;
269  when SendPacket_Payload_UDP_DataLoop =>
270  length_count <= length_count - 1;
271  if test_data = x"5A" then -- if Z
272  test_data <= x"41";
273  -- A
274  else
275  test_data <= test_data + 1;
276  end if;
277  dataout <= test_data;
278  if length_count = "000" & x"01" then
279  Sreg0 <= SendPacket_CRC_S1;
280  en_tx_data <= '0';
281  -- a delayed by one clock version of this signal will control the udp data mux
282  end if;
283  when SendPacket_Payload_IP_TotLength2 =>
284  dataout <= IP_length(7 downto 0);
285  -- is length in hex of headers and data
286  Sreg0 <= SendPacket_Payload_IP_ID1;
287  when SendPacket_Payload_IP_VersionAndHeader =>
288  dataout <= x"45";
289  Sreg0 <= SendPacket_Payload_IP_ToS1;
290  when SendPacket_Payload_IP_TotLength1 =>
291  dataout <= IP_length(15 downto 8);
292  Sreg0 <= SendPacket_Payload_IP_TotLength2;
293  when SendPacket_Payload_IP_ToS1 =>
294  dataout <= x"00";
295  Sreg0 <= SendPacket_Payload_IP_TotLength1;
296  when SendPacket_Payload_IP_ID1 =>
297  dataout <= x"35";
298  Sreg0 <= SendPacket_Payload_IP_ID2;
299  when SendPacket_Payload_IP_ID2 =>
300  dataout <= x"79";
301  Sreg0 <= SendPacket_Payload_IP_FlagsAndFrag;
302  when SendPacket_Payload_IP_FlagsAndFrag =>
303  dataout <= x"00";
304  Sreg0 <= SendPacket_Payload_IP_FragmentOffset;
305  when SendPacket_Payload_IP_FragmentOffset =>
306  dataout <= x"00";
307  Sreg0 <= SendPacket_Payload_IP_TTL;
308  when SendPacket_Payload_IP_TTL =>
309  dataout <= x"80";
310  -- number of hops allowed
311  Sreg0 <= SendPacket_Payload_IP_Protocol;
312  when SendPacket_Payload_IP_Protocol =>
313  dataout <= x"11";
314  --UDP
315  Sreg0 <= SendPacket_Payload_IP_Checksum1;
316  when SendPacket_Payload_IP_Checksum1 =>
317  dataout <= checksum(15 downto 8);
318  Sreg0 <= SendPacket_Payload_IP_Checksum2;
319  when SendPacket_Payload_IP_Checksum2 =>
320  dataout <= checksum(7 downto 0);
321  Sreg0 <= SendPacket_Payload_IP_SourceAddr1;
322  when SendPacket_Payload_IP_SourceAddr1 =>
323  dataout <= x"C0";
324  Sreg0 <= SendPacket_Payload_IP_SourceAddr2;
325  when SendPacket_Payload_IP_SourceAddr2 =>
326  dataout <= x"A8";
327  Sreg0 <= SendPacket_Payload_IP_SourceAddr3;
328  when SendPacket_Payload_IP_SourceAddr3 =>
329  dataout <= x"85";
330  Sreg0 <= SendPacket_Payload_IP_SourceAddr4;
331  when SendPacket_Payload_IP_SourceAddr4 =>
332  dataout <= addrs;
333  Sreg0 <= SendPacket_Payload_IP_DestAddr1;
334  when SendPacket_Payload_IP_DestAddr1 =>
335  dataout <= dest_ip(31 downto 24);
336  -- 192.168.133.1 => 0 x C0 A8 85 01
337  Sreg0 <= SendPacket_Payload_IP_DestAddr2;
338  when SendPacket_Payload_IP_DestAddr2 =>
339  dataout <= dest_ip(23 downto 16);
340  Sreg0 <= SendPacket_Payload_IP_DestAddr3;
341  when SendPacket_Payload_IP_DestAddr3 =>
342  dataout <= dest_ip(15 downto 8);
343  Sreg0 <= SendPacket_Payload_IP_DestAddr4;
344  when SendPacket_Payload_IP_DestAddr4 =>
345  dataout <= dest_ip(7 downto 0);
346  Sreg0 <= SendPacket_Payload_UDP_SourcePort1;
347  when SendPacket_Preamble_S58 =>
348  dataout <= x"D5";
349  Sreg0 <= SendPacket_Dest_S22;
350  when SendPacket_Preamble_S57 =>
351  delay_count <= delay_count - 1;
352  dataout <= x"55";
353  tx_en <= '1';
354  crc_gen_init <= '0';
355  if delay_count = 1 then
356  Sreg0 <= SendPacket_Preamble_S58;
357  end if;
358  when SendPacket_CRC_crc4 =>
359  Sreg0 <= sleep;
360  crc_gen_rd <= '0';
361  tx_en <= '0';
362  when SendPacket_CRC_crc3 =>
363  Sreg0 <= SendPacket_CRC_crc4;
364  when SendPacket_CRC_crc2 =>
365  Sreg0 <= SendPacket_CRC_crc3;
366  when SendPacket_CRC_S59 =>
367  delay_count <= delay_count - 1;
368  if delay_count = 1 then
369  Sreg0 <= SendPacket_CRC_crc1;
370  crc_gen_rd <= '1';
371  crc_gen_en <= '0';
372  end if;
373  when SendPacket_CRC_crc1 =>
374  Sreg0 <= SendPacket_CRC_crc2;
375  when SendPacket_CRC_S1 =>
376  dataout <= x"00";
377  if zero_fill_count = ("000" & x"00") then
378  Sreg0 <= SendPacket_CRC_crc1;
379  crc_gen_rd <= '1';
380  crc_gen_en <= '0';
381  else
382  Sreg0 <= SendPacket_CRC_S59;
383  delay_count <= conv_integer(zero_fill_count);
384  end if;
385 --vhdl_cover_off
386  when others =>
387  null;
388 --vhdl_cover_on
389  end case;
390  end if;
391  end if;
392 end process;
393 
394 end create_packet_arch;