otsdaq_prepmodernization  v2_05_02_indev
a_0209757386_3212880686.c
1 /**********************************************************************/
2 /* ____ ____ */
3 /* / /\/ / */
4 /* /___/ \ / */
5 /* \ \ \/ */
6 /* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */
7 /* / / All Right Reserved. */
8 /* /---/ /\ */
9 /* \ \ / \ */
10 /* \___\/\___\ */
11 /***********************************************************************/
12 
13 /* This file is designed for use with ISim build 0x7708f090 */
14 
15 #define XSI_HIDE_SYMBOL_SPEC true
16 #include <memory.h>
17 #include "xsi.h"
18 #ifdef __GNUC__
19 #include <stdlib.h>
20 #else
21 #include <malloc.h>
22 #define alloca _alloca
23 #endif
24 extern char* STD_STANDARD;
25 static const char* ng1 = "Function if_then_else ended without a return statement";
26 extern char* IEEE_P_2592010699;
27 static const char* ng3 = "Function map_ready_valid ended without a return statement";
28 
29 unsigned char ieee_p_2592010699_sub_1690584930_503743352(char*, unsigned char);
30 
31 int xilinxcorelib_a_0209757386_3212880686_sub_3672023036_3057020925(char* t1,
32  unsigned char t2,
33  int t3,
34  int t4)
35 {
36  char t5[128];
37  char t6[16];
38  char t10[8];
39  int t0;
40  char* t7;
41  char* t8;
42  char* t9;
43  char* t11;
44  char* t12;
45  char* t13;
46  char* t14;
47  char* t15;
48  unsigned char t16;
49  char* t17;
50  char* t18;
51  int t19;
52 
53 LAB0:
54  t7 = (t5 + 4U);
55  t8 = ((STD_STANDARD) + 384);
56  t9 = (t7 + 88U);
57  *((char**)t9) = t8;
58  t11 = (t7 + 56U);
59  *((char**)t11) = t10;
60  *((int*)t10) = 0;
61  t12 = (t7 + 80U);
62  *((unsigned int*)t12) = 4U;
63  t13 = (t6 + 4U);
64  *((unsigned char*)t13) = t2;
65  t14 = (t6 + 5U);
66  *((int*)t14) = t3;
67  t15 = (t6 + 9U);
68  *((int*)t15) = t4;
69  t16 = (!(t2));
70  if(t16 != 0)
71  goto LAB2;
72 
73 LAB4:
74  t8 = (t7 + 56U);
75  t9 = *((char**)t8);
76  t8 = (t9 + 0);
77  *((int*)t8) = t3;
78 
79 LAB3:
80  t8 = (t7 + 56U);
81  t9 = *((char**)t8);
82  t19 = *((int*)t9);
83  t0 = t19;
84 
85 LAB1:
86  return t0;
87 LAB2:
88  t17 = (t7 + 56U);
89  t18 = *((char**)t17);
90  t17 = (t18 + 0);
91  *((int*)t17) = t4;
92  goto LAB3;
93 
94 LAB5:;
95 }
96 
97 char* xilinxcorelib_a_0209757386_3212880686_sub_3999167911_3057020925(
98  char* t1, char* t2, unsigned char t3, char* t4, char* t5, char* t6, char* t7)
99 {
100  char t9[40];
101  char* t0;
102  char* t10;
103  char* t11;
104  unsigned char t12;
105  char* t13;
106  char* t14;
107  unsigned char t15;
108  char* t16;
109  unsigned char t17;
110  char* t18;
111  unsigned int t19;
112  char* t20;
113  int t21;
114  char* t22;
115  int t23;
116  char* t24;
117  int t25;
118  char* t26;
119  char* t27;
120  int t28;
121  unsigned int t29;
122 
123 LAB0:
124  t10 = (t9 + 4U);
125  *((unsigned char*)t10) = t3;
126  t11 = (t9 + 5U);
127  t12 = (t4 != 0);
128  if(t12 == 1)
129  goto LAB3;
130 
131 LAB2:
132  t13 = (t9 + 13U);
133  *((char**)t13) = t5;
134  t14 = (t9 + 21U);
135  t15 = (t6 != 0);
136  if(t15 == 1)
137  goto LAB5;
138 
139 LAB4:
140  t16 = (t9 + 29U);
141  *((char**)t16) = t7;
142  t17 = (!(t3));
143  if(t17 != 0)
144  goto LAB6;
145 
146 LAB8:
147  t18 = (t5 + 12U);
148  t19 = *((unsigned int*)t18);
149  t19 = (t19 * 1U);
150  t0 = xsi_get_transient_memory(t19);
151  memcpy(t0, t4, t19);
152  t20 = (t5 + 0U);
153  t21 = *((int*)t20);
154  t22 = (t5 + 4U);
155  t23 = *((int*)t22);
156  t24 = (t5 + 8U);
157  t25 = *((int*)t24);
158  t26 = (t2 + 0U);
159  t27 = (t26 + 0U);
160  *((int*)t27) = t21;
161  t27 = (t26 + 4U);
162  *((int*)t27) = t23;
163  t27 = (t26 + 8U);
164  *((int*)t27) = t25;
165  t28 = (t23 - t21);
166  t29 = (t28 * t25);
167  t29 = (t29 + 1);
168  t27 = (t26 + 12U);
169  *((unsigned int*)t27) = t29;
170 
171 LAB1:
172  return t0;
173 LAB3:
174  *((char**)t11) = t4;
175  goto LAB2;
176 
177 LAB5:
178  *((char**)t14) = t6;
179  goto LAB4;
180 
181 LAB6:
182  t18 = (t7 + 12U);
183  t19 = *((unsigned int*)t18);
184  t19 = (t19 * 1U);
185  t0 = xsi_get_transient_memory(t19);
186  memcpy(t0, t6, t19);
187  t20 = (t7 + 0U);
188  t21 = *((int*)t20);
189  t22 = (t7 + 4U);
190  t23 = *((int*)t22);
191  t24 = (t7 + 8U);
192  t25 = *((int*)t24);
193  t26 = (t2 + 0U);
194  t27 = (t26 + 0U);
195  *((int*)t27) = t21;
196  t27 = (t26 + 4U);
197  *((int*)t27) = t23;
198  t27 = (t26 + 8U);
199  *((int*)t27) = t25;
200  t28 = (t23 - t21);
201  t29 = (t28 * t25);
202  t29 = (t29 + 1);
203  t27 = (t26 + 12U);
204  *((unsigned int*)t27) = t29;
205  goto LAB1;
206 
207 LAB7:
208  xsi_error(ng1);
209  t0 = 0;
210  goto LAB1;
211 
212 LAB9:
213  goto LAB7;
214 
215 LAB10:
216  goto LAB7;
217 }
218 
219 unsigned char xilinxcorelib_a_0209757386_3212880686_sub_2920649328_3057020925(
220  char* t1, int t2, unsigned char t3, unsigned char t4, unsigned char t5)
221 {
222  char t7[16];
223  unsigned char t0;
224  char* t8;
225  char* t9;
226  char* t10;
227  char* t11;
228  unsigned char t12;
229  unsigned char t13;
230 
231 LAB0:
232  t8 = (t7 + 4U);
233  *((int*)t8) = t2;
234  t9 = (t7 + 8U);
235  *((unsigned char*)t9) = t3;
236  t10 = (t7 + 9U);
237  *((unsigned char*)t10) = t4;
238  t11 = (t7 + 10U);
239  *((unsigned char*)t11) = t5;
240  t12 = (t2 == 5);
241  if(t12 != 0)
242  goto LAB2;
243 
244 LAB4:
245  t12 = (t2 == 6);
246  if(t12 != 0)
247  goto LAB6;
248 
249 LAB7:
250  t12 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t5);
251  t0 = t12;
252 
253 LAB1:
254  return t0;
255 LAB2:
256  t13 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t3);
257  t0 = t13;
258  goto LAB1;
259 
260 LAB3:
261  xsi_error(ng3);
262  t0 = 0;
263  goto LAB1;
264 
265 LAB5:
266  goto LAB3;
267 
268 LAB6:
269  t13 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t4);
270  t0 = t13;
271  goto LAB1;
272 
273 LAB8:
274  goto LAB3;
275 
276 LAB9:
277  goto LAB3;
278 }
279 
280 static void xilinxcorelib_a_0209757386_3212880686_p_0(char* t0)
281 {
282  char* t1;
283  char* t2;
284  unsigned char t3;
285  unsigned char t4;
286  char* t5;
287  char* t6;
288  char* t7;
289  char* t8;
290  char* t9;
291 
292 LAB0:
293 LAB3:
294  t1 = (t0 + 7536U);
295  t2 = *((char**)t1);
296  t3 = *((unsigned char*)t2);
297  t4 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t3);
298  t1 = (t0 + 63616);
299  t5 = (t1 + 56U);
300  t6 = *((char**)t5);
301  t7 = (t6 + 56U);
302  t8 = *((char**)t7);
303  *((unsigned char*)t8) = t4;
304  xsi_driver_first_trans_fast(t1);
305 
306 LAB2:
307  t9 = (t0 + 63536);
308  *((int*)t9) = 1;
309 
310 LAB1:
311  return;
312 LAB4:
313  goto LAB2;
314 }
315 
316 extern void xilinxcorelib_a_0209757386_3212880686_init()
317 {
318  static char* pe[] = {(void*)xilinxcorelib_a_0209757386_3212880686_p_0};
319  static char* se[] = {
320  (void*)xilinxcorelib_a_0209757386_3212880686_sub_3672023036_3057020925,
321  (void*)xilinxcorelib_a_0209757386_3212880686_sub_3999167911_3057020925,
322  (void*)xilinxcorelib_a_0209757386_3212880686_sub_2920649328_3057020925};
323  xsi_register_didat(
324  "xilinxcorelib_a_0209757386_3212880686",
325  "isim/ethernetFIFO_tb.exe.sim/xilinxcorelib/a_0209757386_3212880686.didat");
326  xsi_register_executes(pe);
327  xsi_register_subprogram_executes(se);
328 }