tdaq-develop-2025-02-12
ROC_Registers.h
1 #ifndef ROC_REGISTERS_H
2 #define ROC_REGISTERS_H
3 
4 // #include <functional> // std::bind, std::function (if needed)
5 
6 namespace ROCLib {
7 enum ROC_Register : uint16_t
8 {
9  // FPGA1 registers
10  CR = 0x00,
11  GTP_CRC = 0x02,
12  ActivePortsHigh = 0x08,
13  ActivePortsLow = 0x09,
14  PLLMuxHigh = 0x17,
15  PLLMuxHLow = 0x18,
16  PLLStat = 0x19, // bit 0 is pwr dwn, bit 4 is lock
17  GTPRxRead = 0x20, // GTP0 input trace
18  CRS = 0x27,
19  TestCounter = 0x35,
20  MarkerCnt = 0x41,
21  HeartBeat = 0x42,
22  LastEventLength = 0x43,
23  InjectionTS = 0x44,
24  LoopbackMode = 0x47,
25  LoopbackMarkerCnt = 0x4A,
26  sendGR = 0x58,
27  InjectionCnt = 0x59,
28  InjectionLength = 0x5A,
29  UpTimeHigh = 0x6C,
30  UpTimeLow = 0x6D,
31  LinkErrors = 0x80,
32  DRCntHigh = 0x82,
33  DRCnLow = 0x83,
34  GTPTxRead = 0x85,
35  GitHashHigh = 0x96,
36  GitHashLow = 0x97,
37  Version = 0x99,
38 
39  // FPGA2 (data-FPGAs) registers
40  Data_Broadcast = 0x300,
41  Data_CRC = 0x00,
42  Data_DDR_WriteHigh = 0x02,
43  Data_DDR_WriteLow = 0x03,
44  Data_DDR_ReadHigh = 0x04,
45  Data_DDR_ReadLow = 0x05,
46 
47  // uC functions
48  Reset = 0x8001,
49  TRIG = 0x800B,
50 }; // end ROC_Register enum
51 
52 uint16_t ROC_Register_Data[] = {0x400, 0x800, 0xC00};
53 
54 
55 } // namespace ROCLib
56 
57 #endif // ROC_REGISTERS_H